0-10V analog isolator design

[garimella]

I need a simple scheme to isolate the incoming 0-10V signal. I surveyed and narrowed to two choices, first being ISO124 and second being linear optocoupler. Help required to finalize the choice. Accuracy of isolated output shall be 0.03% FSR

 

[KlausST]

Hi,

0.03%FS .. quite a challenge.

What did you do so far?
Did you check on datasheets of the devices in question whether they are suitable?

***
Other possible solutions:
* triangle waveform and comparator --> optocoupler --> low pass filter
* ADC --> optocoupler --> DAC

Klaus

 

[D.A.(Tony)Stewart]

It's the best choice for $12 or $20 (1) Maximum Nonlinearity: 0.010% since you offered no budget specs.

If you were specific about cost or demand cheaper, there are many.

Cheapest https://www.ti.com/lit/ta/sszt876/s...=https%3A%2F%2Fwww.ti.com%2Fproduct%2FAMC1200

 

[danadakk]

Isolation Amps :

https://www.analog.com/en/parametricsearch/11062#/

Digital and A/D :

https://www.analog.com/en/product-category/isolation.html

Regards, Dana.

 

[D.A.(Tony)Stewart]

For performance, the layout would look like this EVAL board. But low Vin and less accurate 1%

The better your specs, the easier the choices

Some are $.LTB, others lack linearity.. Improve your must have and nice to have specs if you want to be a pro.

 

[KlausST]

Hi,

Maximum Nonlinearity: 0.010%

True. But offset is another accuracy error to be taken into account.

Expected bandwidth is an inportant parameter to know to find a suitable solutin.

Klaus

 

[D.A.(Tony)Stewart]

Hi,

True. But offset is another accuracy error to be taken into account.

Expected bandwidth is an inportant parameter to know to find a suitable solutin.

Klaus

All unstated important specs are missing.

 

[garimella]

Oops, missed that one. It is required for DC applications BW=5Hz.

 

[D.A.(Tony)Stewart]

Oops, missed that one. It is required for DC applications BW=5Hz.

what else defines all IO parameters?

 

[cupoftea]

This may have been said already, if so sorry...

..just send through PWM through a digital isolator.....then PWM a 10V rail on the isolated side.
PWM of eg 60% means you get 60% of 10V on the ioslated side.

Ie, do a RC filtered PWM on the other side..with PWM duty the same as the pwm you send through the digi isolator.

I think Klaus already said how to get the pwm from your 0-10v, by using triangle wave osc and comparator

 

[D.A.(Tony)Stewart]

I think I already have said many times, if you cannot define the critical specs, you have no idea how to design or even choose which design is easiest, cheapest or best performance.

Those are both excellent choices and as cuppa said just use PWM thru a digital isolator has no idea that a digital isolator works down to DC with maximum non-linearity of 0.01% dB full scale just like the ultra-linear optical solution. ( That's a 80 dB range ) for 5 Hz BW and PWM ripple must be filtered to this level in SNR and this PWM is internal.

I think that gain error is critical, for example;
±0.50 % gain error can still have 0.01% nonlinearity error.

yet no such requirement has been given.

What are all the critical specs that you must verify? including cost, availability, qty.

 

[FvM]

Post #1 says accuracy 0.03 % FSR. Without additional specs, this must be read as total error (INL + offset + gain error) over used temperature range. 5 Hz BW has been added later on. State-of-the-art "isolation amplifiers" (actually implemented as AD-isolator-DA chain) are achieving this accuracy level with delta-sigma modulators. PWM modulators with analog ramp generators are typically missing the requirement due to capacitor loss factor.

 

[D.A.(Tony)Stewart]

Post #1 says accuracy 0.03 % FSR. Without additional specs, this must be read as total error (INL + offset + gain error) over used temperature range. 5 Hz BW has been added later on. State-of-the-art "isolation amplifiers" (actually implemented as AD-isolator-DA chain) are achieving this accuracy level with delta-sigma modulators. PWM modulators with analog ramp generators are typically missing the requirement due to capacitor loss factor.

In other words, if the PWM ripple is greater than the resolution of the ADC then non monotonic missing codes or random hysteresis may occur due to the noise caused by Vpp ripple, again, if it exceeds the resolution.

 

[FvM]

Ripple is a problem, but can be overcome with respective filters. The biggest problem is ramp nonlinearity. The same reason why dual-slope converters don't achieve sufficient linearity beyond 4.5 digits.

 

[D.A.(Tony)Stewart]

Post #1 says accuracy 0.03 % FSR. Without additional specs, this must be read as total error (INL + offset + gain error) over used temperature range. 5 Hz BW has been added later on. State-of-the-art "isolation amplifiers" (actually implemented as AD-isolator-DA chain) are achieving this accuracy level with delta-sigma modulators. PWM modulators with analog ramp generators are typically missing the requirement due to capacitor loss factor.

In other words, if the PWM ripple is greater than the resolution of the ADC then non monotonic missing codes or random hysteresis may occur due to the noise caused by Vpp ripple, again, if it exceeds the resolution. Non-monotonic errors can occur in uC's that do not separate Agnd from Dgnd in the layout as digital noise shifts the ground of Vref used by the ADC and in such cases, causes non-monotonic or non-linearity errors where ground noise exceeds the lsb. (least significant bit.) I have personally observed this error in early ADC's designed by infamous analog author Jerome xxx for Burr-Brown in Mil-Std 883 hirel 12 bit ADC ceramic hybrids (circa 1977), so any should expect this to occur in any modern uC with poor layouts for separating digital ground from analog ground.

The test for non-linear accuracy is easy to perform using a monotonic DAC verified with a full scale slow triangle wave and compare analog input to the uC ADC and analog output of DAC in a differential mode on a scope with a full scale signal , so that every quantization level is verified yet non-saturating the DSO using AC coupling if necessary for a fast waveform and look for differential quantization steps on the DAC greater than 1 bit. This would be hard to see with 12 bits or more so A-B analog method is needed to easily see the non-linearity. In the case of the BB ADC hybrid above, it was due to TTL digital noise inside the hybrid causing ripple on the Vref ground. It was corrected by using the commercial version which did not have this error that may have been revised in internal construction, although had precap X-RAY inspection for Mil...883B reliability rating. That only proves hi-rel parts do not always screen for design flaws.