arya.jagadeesh
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i imported design by layout xl(generate from source)
it is showing drc error at all the metal contacts at sources and drains of transistors like metal width should be>0.07 and area should be >0.12um2
these are there in drm of gpdk90....still here i am not changing any thing it is automatically generated from source....how to correct it
thanks
it is showing drc error at all the metal contacts at sources and drains of transistors like metal width should be>0.07 and area should be >0.12um2
these are there in drm of gpdk90....still here i am not changing any thing it is automatically generated from source....how to correct it
thanks