Hi, guys
As you can see in the schematic, there is an OPA used in this bandgap design. The post silicon validation data I have for similar design is basically fine. I mean it could work well by varying power supply or temperature (<5mV from 2~5V and 0~100degree). But the problem is that the output voltage of bandgap is not the same from die to die. (1.1 ~1.3 for example). Does anyone have the same expericence on this issue? I mean, like OPA offset, or the PSRR, or there should be a low impedance buffer of the OPA used etc... Please helps me to solve this problem.
cliff