Hi, I would like to generate a spice netlist from Cadence Schematic. I have googled and found comments saying using HSPICE simulator which is not working for me.
Is there another way to generate a spice netlist from Schematic?
For what purpose do you need to generate it? (Just asking, since you do not get the models).
* There is export as CDL which is to some extent spice-like and needs some tweaking. From the CIW, File, Export.
* You can also use the assura-tool to save extracted netlist as spice, but also needs a bit of hands-on.
Thanks jjx for your answer. I need the spice model for use in another external tool. I want to use several vcvs, vccs piecewise linear sources. I simulate the behaviour in Cadence Spectre so I know that if I extract their spice model, it will perform correctly in the external tools.
Now I have tried CDL export but got only the schematic as a subcircuit with in/out pins but nothing inside. There is no components or sources in extracted netlist.