generic VHDL functions to determine vector length

[shaiko]

Hello,

I'd like to write a synthesizable generic function that recieves an integer and returns the vector length. i.e:

If the input to the function is the integer 6, which is binary "110" the function returns 3.
If the input to the function is the integer 124, which is binary "1111100" the function returns 7.

Any suggestions?

 

[TrickyDicky]

My first question is - what is the context of this. Are you going to be using this in logical code, or are you just using it to set up the lengths of vectors? If its the former, why do you need the length of an integer (because you will have set the length of the vector already, and cant change it on the fly).

For the latter, you just need a log2 function:

function log2(x : natural) return natural is --has to be natural, cant have log2 of neg number
  variable temp : natural := 1; --length always has to be at least 1
  variable x_temp : natural := x;
begin
  while x_temp > 1 loop
    temp := temp + 1;
    x_temp := x_temp /2;
  end loop;

  return temp;
end function;

---------- Post added at 11:17 ---------- Previous post was at 11:16 ----------

for the length of signed numbers, you use the same function and add 1 (for the sign bit)

 

[shaiko]

I'm using it to set up the lengths of pre synthesized vectors.
did you mean "if" (instead of "while")?

 

[TrickyDicky]

then its not a synthesisable function, because set-up can be done with any code (including non-synthesisable things like real types).

No I did not mean if. The while loop keeps dividing the number by 2 until its run out of 1s. on each loop the returned length is incremented by 1. (you should not use this function inside a process, other than to set up variable lengths).

 

[shaiko]

Sorry for the misunderstanding. when I said "pre synthesized vectors" I meant that the function is going to be used on vectors in the definition state.

Can you write:

"for x_temp > 1" instead of "while x_temp > 1" ?