Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Generation of code in degub mode (does comp add extra code?)

Status
Not open for further replies.

Ninochip

Newbie level 4
Joined
Jan 5, 2010
Messages
7
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Location
Europe
Activity points
1,372
Hi all,
I have a question related to the generation of the code in debug and release mode.

I'm using a Renesas R8C uC, IAR compiler, High-performance Embedded Workshop and a Renesas ICD.

Supposing that both in debug and release mode the optimization are disabled to generate exactly the same hex files.

I affirm that, in this case, in debug and realise mode hex files are the same but debug mode has a small portion more. In other word the compiler adds a portion of code to manage debug features.

Is it correct or not?

Thanks a lot in advance
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top