Hmm, another obvious attempt of someone trying to write VHDL as if it were a software language.
Don't any of the professors at the universities these students come from tell them that VHDL is a Hardware Description Language?
No clocks, no sense of time, using "variables" because that's what they call them in C.
I think you need to read a book on synthesizable VHDL before you try writing code or at least look at some synthesizable VHDL examples. https://www.asic-world.com/examples/vhdl/