generate with condition on input and module instantation

[manchal]

i m designing a multiplier with 2 d bypassing.This requires module to be called on conditional basis of input.Module "muxsum" and "fa" are being called depending on the input 'b'.As the input is given after simulation,so the condition on b is not acceptable."b" is input.Please help and guide.

generate for(ii=0;ii<n;ii=ii+1)
begin :abcc

if(ii==0)
begin
if(b[1]==1) begin //ERROR b IS NOT A CONSTANT
for(j=0;j<4;j=j+1)
begin :abcc1
fa(p[ii][j+1],p[ii+1][j],0,s[ii][j],c[ii][j]);
muxsum (s[ii][j],p[ii][j+1],b[ii+1],sm[ii][j]);
muxsum (c[ii][j],0,b[ii+1],cm[ii][j]);
end
end //end of if

else begin
for(j=0;j<n;j=j+1)
begin: abcc2
muxsum (p[ii+1][j],s[ii][j],b[ii+1],sm[ii][j]);
muxsum (c[ii][j],0,b[ii+1],cm[ii][j]);
end
end

 

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i m designing a multiplier with 2 d bypassing.This requires module to be called on conditional basis of input.Module "muxsum" and "fa" are being called depending on the input 'b'.As the input is given after simulation,so the condition on b is not acceptable."b" is input.Please help and guide.

Based on your description you should be using a mux instead of using b in the if statement. You can't use b to selectively synthesize the muxsum and fa. You need both instances for every bit in b and use b to select which is used for any given b[?:0] value.

What you wrote is more akin to dynamically instantiating modules in your code which can't be done as there is no such thing as dynamically instantiated hardware (unless you use some sort of dynamic reconfiguration).

 

[manchal]

I cudnt understand " your description you should be using a mux instead of using b in the if statement." Pls explain.
I need to call "fa and muxsum" if value of a bit in "b" is 1 and call only"muxsum' if value of bit in "b" is 0.Suppose if b[1] in b[3:0] is 1,it will call "fa and muxsum" modules ,and if b[1] is 0,it will call "muxsum" only.

 

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You can't perform "calls" this isn't software you're writing.

This is hardware so for each input bit of b you have to have both possible pieces of hardware fa and muxsum available to generate the appropriate output depending on a b bit. Hence a multiplexer with b as the select line. Now from what you've stated there may be more than one multiplexer to do what you want. Unless you can draw a diagram of how fa and muxsum interact....

If you don't know how to draw the circuit you can't describe it in a Hardware Description Language (HDL).