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[SOLVED] gate drive for N-channel mosfet

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dark night

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hi,
I've designed a boost converter with a 30V input. It is running at 60% duty cycle.

for pwm circuit i have been used pic to generate a pwm.



so my question is (as shown in the circuit) hows the pwm inverted (after gate drive)

any help to understand the operation of the gate drive?

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karthick1987

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Hi dark night,

Look at it carefully, And you will see that when the uC outputs a HIGH, that causes the FET to conduct, which means node 3 is at GND potential. This causes the PNP BJT to conduct while at the same time the NPN BJT dosent conduct because the common emitter would be sitting at 0.7V above the base(node 3 which is GND) of the NPN BJT, hence no conduction will occur for the NPN BJT. With this you can infer that when the uC output is HIGH then the PNP BJT is turned on and the Emitter is switched to LOW. And when uC output is LOW, then the FET is OFF and the NPN conducts because Vbe is positive but PNP BJT dosent conduct because it cant sink any current. Hence the common emitter sits at Vcc (technically a diode drop should be accounted for as well).

Therefore its inverted

hope that helps
K
 
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