gain of two stage op amp

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daintyvlsi

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We are trying to simulate a two stage op-amp of Sedra Smith. But we get gain of around 12 dB. Can anyone please tell the ideal region of operation of different MOS alongwith diagram so as to get maximum gain, as soon as possible?
 

Got all the mosfets in saturation by applying a bias voltage of 1.1 V at the gate of Q8 and Q5. L is .18 micrometer. The simulation is being done in mentor graphics in tsmc018. Still the gain doesn't buzz from 20 dB.
 

Your schematic looks quite wrong.. I think the MOS q8 and q3 should be diode connected (i.e.. gate to drain should be shorted). Once you do this, you dont need to apply 1.1v at the q8.
 
i agree with findirharsha , your circuit meet serious symmetric problem . pls check it again . after all , y should design the current value of Q5 is small , and ratio W/l of Q1 , Q2 is relatively big to get high gain
 
Hi daintyvlsi,

To calculate the gain of this circuit, the first thing you must do is fixing your circuit as some guys mentioned above. And then, you draw the small signal equivalent circuit, you will that the gain is:

Av = gm2*(r02//r04)*gm6*(r06//r07)

After that you can build a test-bench circuit to simulate with spice to verify the results.
Hope this help!
 
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    butchi

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