Gain expansion

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嗨，我在设计功率放大器时看到了 5dB 的增益扩展，栅极电压显示 MOSFET 在深度 AB 类中工作。我不希望这种增益扩大，但我不知道如何减少这种现象。请问你能帮帮我吗？

[Betwixt] For the benefit of non-Chinese speakers, it translates as:

Hi, I saw a gain extension of 5dB when designing a power amplifier, and the gate voltage shows that the MOSFET is working in deep class AB. I don't want this gain to expand, but I don't know how to reduce this phenomenon. Could you please help me?
 
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Gain expansion is pretty much unavoidable in a class-AB amplifier.
Placing the PA bias near class-A, the gain expansion will be minimized.
 

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Are you talking about 5dB extra voltage gain when both class-AB output transistors conduct at crossover? Emitter-followers don't do it because their gain is never more than 1.

If you have a Mosfet pair operating as common-source instead of as followers then the amplifier's negative feedback should reduce the extra gain at crossover.
 

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vfone said:
Gain expansion is pretty much unavoidable in a class-AB amplifier.
Placing the PA bias near class-A, the gain expansion will be minimized.
Click to expand...
Yeah, I have increased the DC bias, while this phenomena didn't get better, and I check the active voltage of MOSFET, just as the picture shows, I think it's still in deep CLASS AB.
 

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I got a inductor at source of transistor while it has a little effect. And the OP1dB, gain decreased a lot.
 

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I think is about an LDMOS PA. LDMOS have AB-class gain expansion higher than other technologies.
If increasing the bias doesn't help much, the only thing that remain is to do a larger back-off power.
Gain expansion may affect the phase change during expansion, so is good to increase the PA bias or to do the power back-off just to pass those phase change system requirements.
 

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Gain expansion occurs when the Input Signal Amplitude starts to shift the Bias Point of the Amplifier ( especially the last stage of a Chain ) through increment sense .In order to overcome this phenomena, Bias Voltage can be adjusted according to Output Power like Envelope Tracking.It's a bit complicated but efficient.
 

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1dB gain expansion is acceptable, while 3 or 5dB is too terrible.
 

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Yeah, I agree. But this phenomena appears in 2nd driver stage, and it's a cascode structure with three transistors stack, and the voltage swing is extremly large between the middle of the three transistors, I haven't fingured out the reason. Generally, the transistor which connects to the VDD directly suffers the largest voltage swing.
 

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Could you explain how does gain expansion affects the phase change please? I found that decreasing the gate voltage made the gain expansion improved and also AM-PM got better.
 

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Any linear active device when goes in compresion (non-linear mode) starts to affect the AM-PM response.
A main cause of AM-PM effects appears to be the dynamic mistuning of the input match.
The reason that you get better AM-PM response for less gate voltage might be because the gain of the PA is lower.
 

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Yeah, the gain of PA decreases about 2dB, I think the swing is too large which can reach 0.5V~6V, it may cause the CS transistor achieve linear region or deep triode region, while the input match isn't perfect conjugate match, then the current's phase caused by drain voltage is different from caused by gate voltage, so the AM-PM curve is about 8°/dB. I don't konw this idea whether right or wrong.
 

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I also wonder that does this phenomenon is related to the transconductance of large signal. Maybe third-order transconductance?
 

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