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Fully differential Folded Cascode op amp bias

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tompham

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Hi all

Any one has experience to bias fully differential folded cascode op amp without cmfb? It took me a lot of time to make each transistor in saturation. I know with cmfb you can make it more saturation easier. Please let me know your suggestion. Thanks a lot

 

SIDDHARTHA HAZRA

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CMFB is the only solution I feel. If you want to avoid use of a differential amplifier for CMFB network then you can use resistor based CMFB (Follow text book by B.Razavi). But finally it will be CMFB.
As your ckt is a cascode, it inherently has a shielding effect but still across process, voltage and temp it would be hard to keep all the MOSFETs in saturation. So better you go for CMFB.

I do have a suggestion outside CMFB for the ckt that you have designed. The biasing ckt will work but is not perfect. Since you are biasing a cascode MOS by a non-cascode MOS in the bias arm the bias voltage generated might not be proper (Vth will be different). You could have used similar casode structure in the bias arm as well (Follow text book by B.Razavi). Two PMOS in the green bias arm and two NMOS in the pink bias arm.
 

tompham

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Hi SIDDHARTHA HAZRA

Thanks for your answer. I have fixed my bias circuit as your suggestion. The new circuit without cmfb working well. I want to build a discrete cmfb but the question is how to run dc gain and phase margin. I know people can run it in cadence spectre and Hspice. If you know how to run it please show me how in detail. Thanks a lot

 

SIDDHARTHA HAZRA

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Hi tompham,

Hi SIDDHARTHA HAZRA
I want to build a discrete cmfb but the question is how to run dc gain and phase margin. I know people can run it in cadence spectre and Hspice. If you know how to run it please show me how in detail. Thanks a lot

I hope you meant dc gain and phase margin of the cmfb network ..... if so then its simple .... just consider the cmfb amplifier to be your primary amplifier and identify the signal loop ... break the loop at any high impedance point using a voltage source of 0V (We need to break a loop when we are doing a stability analysis because we are interested in knowing the open loop gain and PM of the system) ... You need not add any AC source in the loop ... in stability analysis the tool itself does an ac analysis from the point where you have broken the loop (i.e. from the 0V voltage source)

I hope you are using Cadence ADE .... If so then under analysis tab you will find stb analysis (stability analysis) ..... In the probe section write the instance name of the 0V Voltage source that you have used to break the loop. This is to make the tool understand where you want it to start the analysis from .... all other fields are self explanatory ( else cadence ade user guide is available over internet ). Set it up, do a test bench, generate a netlist and once you run it ..... it will automatically show you Loop Gain, PM and GM for the loop under analysis.

Sorry ... I don't have access to ADE at this moment so can not provide snapshots .... its easy give it a try...

In the schematic biasing ckt you are still using PMb0 and NMb2 to generate baisp2 and baisn2 .... so it is same as the previous design .... The 2nd and 4th branch from left is sufficient for biasing (with little modifications of course) ....
You can use low voltage cascode biasing technique (that was what I was mentioning) ... you can refer to cascode current mirror biasing in the Current mirror chapter (Pg 139) from Design of Analog CMOS Integrated Ckts by B.Razavi.

Hope this will help ... :)
 

xiahanzh

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Hi, tompham,

I do not think you can do it without cmfb. Even though with extremely careful biasing you can make all transistors into saturation region, it is not reliable. DC voltages of your two outputs are not predictable. With little variation (temperature, process, etc.), your circuit is not going to work. Could you let us know why you need a differential amplifier without cmfb?

Xiahan
 

tompham

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Hi xiahanzh

Thanks for your opinion. I just want to compare dc gain with and without cmfb. Do you have any paper to show how to run sc cmfb in spectre or hspice? I want to design chopper op amp and the chopper need switch for modulator. Thanks
 

xiahanzh

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Hi tompham,

I used to design a sc cmfb for ADC in hspice but I cannot find it. I think tran simulation and fft simulation are good enough.

Xiahan
 

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