Hey, high common gain is present because of the flipped voltage followers which are biased with the current sources.
For example If you apply a common mode signal Transistor M1a has no signal comonent (Ugs,1a(t)=0) because gate and source have the same signal with same polarity. Therefore the current through M3 is set by IB but because of the foltage follower circuit the drain of M3 is signal dependant. Therefore Vg,3 has to change to compensate this dependance and to make sure that the current stays at its quiscent component IB. But this means that the NMOS output transistor M7 delivers a small signal current to the output.
Same argumentation for the Pmos part results in a non existing common mode signal component. And this difference is the main reason for the high common mode gain here.
Edit: This is an intuitiv explanation because exact calculation shows that there is also a common mode signal component through the Pmos part but compared to the Nmos part its negligible.