Full scan & Compressed scan

[rushabh007]

Why we use both full scan & compressed scan in testing? can't we do either of these?

 

[rca]

compressed scan technique is to reduce the amount of data needed to check the design, due to limitation of tester memory size.

 

[rushabh007]

Thanks for your reply rca.

my question is why we are doing both like stuck at fault full (SSA_full) & stuck at fault compressed(SSA_comp), can't we do either of this?

suppose if we do SSA_full then why we are doing again ssa_comp on same chip?

if we do SSA_comp then why we are doing SSA_full on same chip?

 

[rca]

sorry I never seen both in the same chip.

 

[layowblue]

full scan mechanism provides more controllability, hence observability than compressed one. If you hit an error in compressed scan mode, you can't say which one of the say 10 chains you compressed is having problem.

 

[rushabh007]

thanks layowblue for your precious reply..

 

[rushabh007]

i got dat difference... but i think controllability & observability are same in full mode & compressed mode.. then how fault location is not detected?

 

[newebu]

If I understand your question correctly , it is the bypass mode and compression mode you are talking about.
Bypass mode is used usually during debugging any simulation failures. especially when chain test is failing in compression mode. In compression mode serial simulation failure debug becomes quite difficult , as single channel is split into many internal chains.
Bypass mode pattarens are kept ready before the silicon arrives, In case of any failure on silicon, bypass patterns will be used to identify the root cause of failure