guitargore
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I have recently created a FSK transceiver in hardware using a 555 timer circuit as the modulator and a XR2211 as the demodulator and I am now looking to implement the system using a dsPIC or similar low cost chip. I however do not have much DSP experience.
My problem is that I am currently working with low frequency carriers(space - 140k, high mark - 105k) while my baudrate it 28.8k. This allows for a worst case of about 2 full cycles per bit depending on phase shifting, as seen during testing. Raising the frequencies beyond 150k is not an option. My current setup works just fine with this though.
How difficult would it be to implement this in a DSP chip? Is this something that could be fixed by oversampling?
Thank you very much for your feedback.
---------- Post added at 18:36 ---------- Previous post was at 18:05 ----------
One more piece of information that I forgot.
It should not be assumed that the incoming signal will be a squarewave. That is why i figured to do it with DSP techniques vs a simple uP.
My problem is that I am currently working with low frequency carriers(space - 140k, high mark - 105k) while my baudrate it 28.8k. This allows for a worst case of about 2 full cycles per bit depending on phase shifting, as seen during testing. Raising the frequencies beyond 150k is not an option. My current setup works just fine with this though.
How difficult would it be to implement this in a DSP chip? Is this something that could be fixed by oversampling?
Thank you very much for your feedback.
---------- Post added at 18:36 ---------- Previous post was at 18:05 ----------
One more piece of information that I forgot.
It should not be assumed that the incoming signal will be a squarewave. That is why i figured to do it with DSP techniques vs a simple uP.