andrewm
Newbie level 3
Hello,
Does anyone has an ideea on how can I implement a frequency divider with seven inputs and one output, which should divide clock pulse from one input by 1, 2, 3, 4, 5 upto 64 (based on a control signal given by other six inputs resulting the divided frequency on a single output) ? any ideea including scheme for this will be great welcomed and much thanked.
Thank you very much.
Does anyone has an ideea on how can I implement a frequency divider with seven inputs and one output, which should divide clock pulse from one input by 1, 2, 3, 4, 5 upto 64 (based on a control signal given by other six inputs resulting the divided frequency on a single output) ? any ideea including scheme for this will be great welcomed and much thanked.
Thank you very much.