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free layout IP and PDK for study/research purposes

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joely2k

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Hi All,
I have a questioned,

1. Where can we get layout databases (GDSII stream) which are free IP , that can uses for research, study and evaluation? Does any foundry, EDA firms or ARM provide such IP? Anywhere from 90nm --> 45nm.
2. Where can I download or get process development kit which is open for public? Let’s say I need some design rules, parasitic RC info for extraction, timing info/arcs, etc.

I tried to google around but to no avail.
 

You may want to have a look at https://www.mosis.com/Technical/Designrules/scmos/scmos-main.html (design rules)
https://www.mosis.com/Technical/Testdata/ami-c5-prm.html (spice models)
https://www.mosis.com/cell-libraries/scn05-pads-tiny/mAMI05P.gds (pad frame in GDS)

There's much more information to be found on the Mosis website.
You can also work with e.g. Europractice/IMEC on the same kind of info, but generally you need to sign an NDA in advance (which shouldn't be an issue if you're serious about making an IC).

Good luck!
 

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