Techie8,
It looks like the ELIS1024 is a CMOS device with 2.7V output. Nice simple chip to use compared to regular CCD which has 1V output. The 2560 chip is designed mostly for CCD as it only can handle 1.3V input range. Normal CCD operation requires correlated double sampling (sample reset reference level and then sample video level take difference), input clamping, dummy / black pixel calibration, programmable video gain etc. If you are using ELIS1024 then you could probably use an OP Amp to scale the output to 0 - 10V and correct the offset (see spec sheet). Then you could use fast AD and input data to FPGA. Calibration would have to be done differently than CCD as ELIS1024 doesn't seem to have optical black pixels. Sorry if you think I am complicating things, but I try to simplify it for you so you can have success faster.
What is your electronics experience ?
Have you coded any HDL at all ?
Scanman