Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronic Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

FPGA project using Nios in DE1

Status
Not open for further replies.

kolopipo

Newbie level 4
Joined
Sep 27, 2009
Messages
5
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,322
FPGA Nios in DE1

Hi all,

I am doing a project in FPGA using DE1 board. I have a few questions:

1) Is it possible to design some modules in C/C++ in SOPC/Nios using Nios IDE or EDS ? I had read the altera website but I still confuse and unsure whether can use C/C++.

2) Is it possible to implement a top level design in Altera Quartus II where it is a mix of modules by SOPC/Nios and Verilog/VHDL modules ? To be specific, can I write a design in C/C++ for Nios and instantiate it in my design in Quartus II.

Thank you in advance. I am still confuse even though had read a lot regarding this topic. Please help.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top