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FPGA Internal RAM Module

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KingMoshe

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Hi all,
I work with lattice lcmxo2-640hc fpga and I want to know if there is an option to write data to the internal RAM of the fpga and read this data after I turn off the FPGA power.
 

Hi,

RAM is volatile, thus the data is lost after power down.

There are external cips like FLASH, EEPROM, NVRAM where you can store data

Klaus
 

there is no way that FPGA have non volatile memory ?
The majority of fpgas are sram based and hence volatile. Some small fpgas, like the max 2 are flash based and hence non volatile. If you need such storage why not just use an external non volatile ram?
 

It seems like your option is either to use an external memory or a flash based FPGA (e.g. Microchip/Microsemi FPGA).
 

The majority of fpgas are sram based and hence volatile. Some small fpgas, like the max 2 are flash based and hence non volatile. If you need such storage why not just use an external non volatile ram?
Because it requires an I2C implementation
 

Hi,

I still don´t get it. Sorry.

Is it your initial aim to implement I2C --> and you (think to) need a non volatile SRAM for this?
If so then: A standard I2C implementation does not need NVRAM, it needs standard RAM or at least FFs. But maybe your application needs some NVRAM to store data, we don´t know.


Or does your application need to use an external non volatile SRAM --> and you need to implement I2C for this?
If this is the case there are some alternatives:
* NVRAM with SPI
* NVRAM with parallel bus
* battery (backup) powering the FPGA
..but I2C implementation is nothing special for an FPGA.

Klaus
 

Hi,

I still don´t get it. Sorry.

Is it your initial aim to implement I2C --> and you (think to) need a non volatile SRAM for this?
If so then: A standard I2C implementation does not need NVRAM, it needs standard RAM or at least FFs. But maybe your application needs some NVRAM to store data, we don´t know.


Or does your application need to use an external non volatile SRAM --> and you need to implement I2C for this?
If this is the case there are some alternatives:
* NVRAM with SPI
* NVRAM with parallel bus
* battery (backup) powering the FPGA
..but I2C implementation is nothing special for an FPGA.

Klaus
The second option is correct. I need non volatile RAM and I prefer to not use I2C communication.
But it seems the best way is to use EEPROM and read the DATA via I2C.
Where can I find Verilog core design for I2C communication with explanations?

Thanks,
Moshe.
 

Hi,

are more than 700,000 internet serach results not sufficient? including almost 10,000 videos...

--> please go through some of them. Then if there still are problems:
* refer to the document you use
* tell what is clear so far
* tell what is unclear

Klaus
 

I would suggest SPI rather than I2C, gives higher transfer speed and less logic cells for implementation. Specifically FRAM, e.g. from Fujitsu like MB85RS64 is a good choice.
 

Another option for non volatile memory would be MRAM (Magnetoresistive Random Access Memory) - IMHO promising for the future use.
 

Another option for non volatile memory would be MRAM (Magnetoresistive Random Access Memory) - IMHO promising for the future use.
It is also a very simple RAM like interface, so it will be easy to write code to interface to. Just make sure you use the write protect pin and enable write protection during power up.
 

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