Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

FPGA Implementation of Hamming Code

Status
Not open for further replies.

edison.pioneer

Newbie level 3
Joined
Sep 21, 2012
Messages
4
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Location
Mumbai
Activity points
1,306
Hello, my final year project is FPGA Implementation of Hamming Code.As far as I know, I need to write seperate programs for Hamming Code, ROM, RAM, Clock Divider, Encoder, Decoder, Syndrome, Transmitter , Receiver and Main.The FPGA I'm using is Actel ProASIC 3 A3P250.The problem, I couldn't get the block diagram clear in my head.And I'm not getting proper guidance from my professors.I don't know how to show the output on the FPGA board.And my DB 25 cable isn't being detected.I'm using Libero v9.1, and simulation has been done properly.

- - - Updated - - -

ALl programming is obviously in VHDL.(Forgot to mention that)
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top