FPGA gps signal simulator?

[JHEnt]

I've been working on a single channel GPS receiver in an Altera Cyclone 4 board kit. I've written it in Verilog. However so far I have been unable to get a signal lock. I was wondering if anyone has a simple signal simulator known to function accurately? I had considered writing it myself but if my receive code is flawed then likely my transmit code would be as well. The other possibility is the RF front end I am using Maxim MAX2769 evaluation kit may not be getting signal through correctly. I had an active antenna and so had to add an inductor to the board and remove a dc blocking capacitor. The board is setup for the inductor to power the antenna but is not factory installed.

I have read the work of Peter Mumford and Andrew Holme however Mumfords appears to be incomplete and I was not planning on having to use Holme's softcore processor Mine trys to do all code shifts at each of 1000 frequency steps from -5KHz to +5KHz around a 4.092MHz IF. This takes 20 minutes to search but it seemed the simplest implementation without needing an external processor. I have a stable 4.092Mhz centered variable NCO for carrier removal and a stable 1.023MHz center variable NCO for chip rate timing. I am producing a half chip early and late along with the prompt chip however I do not get much more than basic noise level correlation. Any help would be appreciated.

 

[ads-ee]

This might be of interest to you. I haven't looked at what they have for source, but maybe they have a testbench with something that generates a GPS input signal.

https://code.google.com/p/cu-hw-gps/