Sink0
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Hi, i have couple questions about using LVDS outputs and M4K RAM as a FIFO.
First of all, is there any license requirements to use any of both Mega-Functions?
Second... If i want to use x2 Serializer i dont need a dedicated PLL, but if i am using a PLL to generate clock to my blocks.. can i use same PLL to drive 5 x2 Serializers and Deserializers?
So far i was using a FIFO made by me with LEs, it is consuming lot of Logic, how much logic usualy a 9x64 FIFO may consume using M4K ram?
I might have couple more questions but thats all for now.
Thank you very much!
First of all, is there any license requirements to use any of both Mega-Functions?
Second... If i want to use x2 Serializer i dont need a dedicated PLL, but if i am using a PLL to generate clock to my blocks.. can i use same PLL to drive 5 x2 Serializers and Deserializers?
So far i was using a FIFO made by me with LEs, it is consuming lot of Logic, how much logic usualy a 9x64 FIFO may consume using M4K ram?
I might have couple more questions but thats all for now.
Thank you very much!