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For (i=8; i>=0; i = i - 1) from verilog to VHDL

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karper1986

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For from verilog to VHDL

Hi! I have a simple question -- how i can express these --> for (i=8; i>=0; i = i - 1) from verilog into VHDL? Thanks.
 

For from verilog to VHDL

Usually we will use (VHDL)
for i in 0 to 8 loop
Am not tried the below logic

for i in 8 downto 0 loop
 

    karper1986

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