Folding structure - Mos Transistor

[MahmoudHassan]

the attached picture form book Design of Analog Integrated circuit page 35
How can the shown folding structure reduces the gate resistance by factor of 4 .... i think it reduces it by factor 2 only ?

as it is written above this picture " We note that Folding reduces the gate resistance by a factor of four "

 

[samabraham]

the attached picture form book Design of Analog Integrated circuit page 35
How can the shown folding structure reduces the gate resistance by factor of 4 .... i think it reduces it by factor 2 only ?

as it is written above this picture " We note that Folding reduces the gate resistance by a factor of four "

1st Case Resistors are in serires so effective R = R+R+R+R = 4R
2nd Case two pair resistors are in series which is in parallel to each-other so effective R = 2R parallel to 2R => 2Rx2R/(2R+2R) = 4RXR/4R =R

so it is reduced by a factor of 4 .

 

[MahmoudHassan]

but did you say that they are parallel in the second case ?

 

[samabraham]

yup...from the figure itself u can identify it, two Rg/2 s are in parallel

 

[MahmoudHassan]

can you it more clear ....how this two resistors are in parallel ?