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[SOLVED] minimum distance between 2 transistor in layout

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Henry98

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Hello everyone,

I have a question about layout IC in cadence tool. I want to layout 2 transistor is closest to each other as possible.
But when I put them nearly, tool warning my a yellows box.
Anyone, Could help me how to fix it? how to find the smallest distance between transistor.
1722578051400.png


Thank you
 

First you read the error. Then you find the rule logic. Where a logical term coincides with error marker is where to fix and the term, is what.

You may wire a multi finger device and avoid the problem or you may place a filler polygon to eliminate the gap (likely to cascade). But finger wiring is densest (if you pick # & width suitably).
 
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