Floating point in VHDL and FPGA

[mmp131316]

Hello everybody,

Does anyone know how to implement signed floating point operations like addition or multiplication in vhdl that would be synthesizable for FPGAs? And if there aren't any libraries available any hints how to represent in vhdl(for FPGA) this floating numbers? Code samples would be highly appreciated :-D.

Thanks for your time;-)!

 

[TrickyDicky]

Xilinx and Altera both supply IP cores for floating point. The answer is simply connect the cores to the algorithm you want.

But I ask do you really need floating point? FPGAs are not ideal for floating point as it takes a lot of resources and has a high latency. Fixed point is much much easier and uses much fewer resources!

 

[mmp131316]

Xilinx and Altera both supply IP cores for floating point. The answer is simply connect the cores to the algorithm you want.

But I ask do you really need floating point? FPGAs are not ideal for floating point as it takes a lot of resources and has a high latency. Fixed point is much much easier and uses much fewer resources!

Fixed point is also good, and does xilinx have a library for this fixed point representation?

 

[TrickyDicky]

There is no need for any special libraries as fixed point is simply integer arithmatic. It can be done simply in VHDL like:

a <= b + c;
d <= e * f;

etc.

 

[jimmy_tag]

Hi the VHDL-2008 revision now provides Floating point calculations library from ieee both testbench and for Synthesis. I have attached a zip which contains new libraries.

 

[TrickyDicky]

Yes it does, but I wouldnt use it. It doesnt provide any pipelining that is required for floating point operations.