flipflops without reset

[sun_ray]

What are the significance of flipflops without resets? Where are they used?

 

[D.A.(Tony)Stewart]

every flip flop is a single bit memory cell.

Memory cells and transmission bus transceivers often just need to latch data with clock. Dynamic RAM needs to be periodically read and re-written to stay latched. These charge storage cells are also called Flip Flops even though they like many mechanical flip flop systems are analog in nature.

FF's with no reset are smaller & cheaper and are used where the initial pwr-on value is not important.

 

[Nandy]

What are the significance of flipflops without resets? Where are they used?

Comparing with reset flipflops, non-reset flipflops are smaller and less power consuming. Normally, datapath uses non-reset flops. State machines flops use reset flops. One good thing to use all reset flops in a design is you have less trouble to trace 'x' propagation issue in gate level simulation.

 

[layowblue]

Also, non-resetable flops will introduce difficulties in ATPG flow in term of coverage. It affects the controllability of DFT.

 

[rca]

Non-resetable flops does not change any thing for DFT or ATPG coverage, because during the first shift in/out, the shift out value are ignore for un-reset flop, and the shift-in define a known value by the tool, and so the capture will be clean.

 

[layowblue]

rca, at least current DFT flow in my company needs special care for un-resetable flops. There would be a lot of types of warnings and even errors regarding them. Designers would have to review it line by line to confirm it's waivable.
All in all, for a mass-product targetting chip, un-resetable flops are not preferred.

Non-resetable flops does not change any thing for DFT or ATPG coverage, because during the first shift in/out, the shift out value are ignore for un-reset flop, and the shift-in define a known value by the tool, and so the capture will be clean.

 

[rca]

We did multiple chips with un-reset flops, but as you mentionned, the designer must confirm and prove that could never corrupted the functionalities.
We usually accept the un-reset flops for local small fifos (embedded in interface modules for example), and also in filtering...

 

[sun_ray]

FF's with no reset are smaller & cheaper and are used where the initial pwr-on value is not important.

Can you please provide examples where initial power on values are not important? How in a datapath initial reset values of flip flops are not important? Is not it always necessary to bring a flipflop to known state and to bring a flip flop to a known state we heed to have the reset? Is not it?

Regards

 

[Warpspeed]

Flip flops without resets are used very often for frequency division.

Initial condition at power up is unimportant for this application.

 

[D.A.(Tony)Stewart]

If a register is used to store an input to be read at a later time, a power up sequence can be designed to sample and save data without need to preset.
This can apply to a bit or byte or even a dual port memory. The design must write valid data before read on power up rather than reset.

 

[jbeniston]

rca, at least current DFT flow in my company needs special care for un-resetable flops. There would be a lot of types of warnings and even errors regarding them. Designers would have to review it line by line to confirm it's waivable.
All in all, for a mass-product targetting chip, un-resetable flops are not preferred.

Other than warnings of the form "FF isn't reset", have you got a concrete example where they are actually a problem? I've not had any "real" problems using Synopsys and Cadence flows before.

- - - Updated - - -

What are the significance of flipflops without resets? Where are they used?

Where the start up condition doesn't matter, and you want to save power or area, or improve frequency.

 

[sun_ray]

Where the start up condition doesn't matter, and you want to save power or area, or improve frequency.

How can you improve frequency by flip flops without reset?

Can anybody sum up the disadvantages of flipflops without reset? It is messed up here and there in this thread?

 

[ads-ee]

How can you improve frequency by flip flops without reset?

Can anybody sum up the disadvantages of flipflops without reset? It is messed up here and there in this thread?

Less area == less logic == less delay == faster operation == higher operating frequency

 

[Warpspeed]

And fewer pin outs per flip flop.

 

[sun_ray]

And fewer pin outs per flip flop.

Reset is an input pin. How do you say fewer pins out? Reset is not an out or output pins? How does fewer pin helps? Can you please be more clear?

 

[Warpspeed]

The pins physically all come out of the chip, whatever their function.

 

[sun_ray]

The pins physically all come out of the chip, whatever their function.

In a chip there will be one reset at the chip I/O and that will be connected to all the reset pins of all the flip flops having a reset. The chip will contain flipflops with resets and without resets also. Where is the advantage then?

 

[Warpspeed]

In a chip there will be one reset at the chip I/O and that will be connected to all the reset pins of all the flip flops having a reset.

Not all chips containing multiple flip flops have a common reset line.
I can think of several chips that have dual flip flops, each with its own individual reset pin.

Check out the CD4044.
Four flip flops.
Four individual resets.
https://pdf1.alldatasheet.com/datasheet-pdf/view/50856/FAIRCHILD/CD4044.html