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Flip-Flop resolution time and CDC synchronizer

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gavinsun

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cdc synchronizer

Hi All,
In our previous design(.15um), we use a dedicated CDC synchronizer cell (zpmtffb) as conversion cell, which is composed by two pipe flip flop, the first one is negedge CLK triggered and the second one is posedge CLK triggered.
It has been proved by tape-out validation.
Now we change the process to 80nm. We discard the tsmc dedicated CDC synchronizer cell for bad output timing. Based on the behavior of zpmtffb, we implement a custom cell using normal flip-flop.
My question is : Can we trust the custom cell when it meet mestabability? In other words, whehter the output of first flip-flop can go to stable state when it feed to the input of next flip-flop after a half clock.
In my option, resolution time of the first flip-flop is the key value to make sure the correct operation.
Can anybody give me some suggestion about this question?
And how can I get the resolution time attribute of a flip-flop ? from TSMC?
Thanks!
Gavin
 

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