Question: When we say read, does the image above show reading 1 bit. How I am seeing it is a WORD (8bits: A, B, C, D, E, F, G, H) comes in to 4 Muxes. Then 4 out of 8 bits get passed on to 4 Muxes and so on. And at the end the final MUX reads only 1 bit. But this does't make sense to me. Like why would you just read 1 bit? It would either me 1 or a 0. What use is that?
Could it be that A B C D E F G H are 8 WORDS instead of bits? What does the example "Example: a 256 bit x 8 bit memory would need 2040 logic blocks just to implement one read port!" at the end mean?
And then regarding Write Ports
Even though the image below is a good explanation but can someone use a bit simpler words to descibe the image below?
It doesn't make sense to you because you aren't looking at this correctly.
This is a single bit of data over 8 addresses, the hard to read low-resolution picture has some signals that look like they might be called sel(0)...sel(2) that are connected to the top of each mux. Those would be address lines for an 8 location memory. In the case of a 256 location ram you would need 8 selects.
If you have 256 deep memory it requires 255 2:1 muxes (256-1, i.e. the n-1) to implement the logic to select 1-bit of data at one of the addresses. Since the memory is 8-bits wide you need 8 of those 255 muxes to implement the muxing for all 8-bits. So that is 255*8 which just happens to be 2040 2:1 muxes.
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You must be really lost if that simple explanation needs an even simpler description...
What they are describing is you take the 8-bit address (selecting 256 possible locations) and generate outputs that select only one address at a time. The description mentions you need 256 logic blocks (actually more than this). It really should tell you that you would need three 4-input LUTs to implement the decoding 2 for decoding 4-bit and 4-bits of the 8-bit address and a third to combine their outputs.