eegchen
Member level 1
comparator without clock
hi,
I am designing a very high speed Flash ADC.
I use CML circuit
And if my input frequency is 2 GHz. And i use several open-loop amp to amplify the error signal to rail-rail(CML swing).
obviously, this will cause power and large delay.
But if this work, how can i determine the sample rate, because there is no clock used in my Flash ADC design.
best WIshes
Gang Chen
hi,
I am designing a very high speed Flash ADC.
I use CML circuit
And if my input frequency is 2 GHz. And i use several open-loop amp to amplify the error signal to rail-rail(CML swing).
obviously, this will cause power and large delay.
But if this work, how can i determine the sample rate, because there is no clock used in my Flash ADC design.
best WIshes
Gang Chen