Fixed-point VHDL and Synopsys Design Compiler

[DVB_master]

Hi all,
I am having problems with Synopsys Design Compiler (version 2007-03-sp1) and VHDL fixed-point library. I have mapped to lib ieee_proposed the files fixed_float_types_c.vhdl and fixed_pkg_c.vhdl taken from the archive "Synopsys.zip" on the "VHDL-2008 Support Library web page".
I am getting error when I analyze the file fixed_pkg_c.vhdl with Design Compiler:

--------------------
-- Compiling Source File xxxxxxxxxxx/fixed_pkg_c.vhdl
Compiling Package Declaration FIXED_PKG
Compiling Package Body FIXED_PKG

-------------------
 1787:     return Is_X (STD_LOGIC_VECTOR (s));
                  ^^^^
[Error] Several subprograms named IS_X exist, but no-one matches

-------------------
 1792:     return Is_X (STD_LOGIC_VECTOR (s)); 
                  ^^^^
[Error] Several subprograms named IS_X exist, but no-one matches

-------------------
 4521:         presult := presult mod (2.0**(left_index+1));  -- wrap
                                  ^^^
[Error] Expression error: no corresponding "MOD" operator defined for operand types

-------------------
 4576:         presult := abs(arg) mod (2.0**(left_index+1));             -- wrap
                                   ^^^
[Error] Expression error: no corresponding "MOD" operator defined for operand types

-------------------
 5171:     return Is_X (argslv);
                  ^^^^
[Error] Several subprograms named IS_X exist, but no-one matches

-------------------
 5180:     return Is_X (argslv);
                  ^^^^
[Error] Several subprograms named IS_X exist, but no-one matches

-------------------
 8394: 
       ^
[Failure] End of compilation: error(s) in design unit BODY/FIXED_PKG

It seems that Synopsys does not have the overload of the function Is_X for handling the type "std_logic_vector".
I have taken a look at the sources of std_logic_1164.vhd in synopsys’ library. I have noticed that there is a meta-comment “synthesis off” just before the definition of the function Is_x and another meta-comment “synthesis on” just after the end of the definition.

Any help to this problem would be appreciated. :smile:
Thanks.

Have a nice day.

 

[EC31272213]

Please help me , I have the same problem as yours. kindly reply as soon as possible.

 

[sharath666]

If there is "synthesis off" before this piece of code and "synthesis on" after this code, it means that you are not supposed to use this code for synthesis. The tool will just ignore everything present between these 2 lines. Search for any alternative...