Well, I'm not going to give you the code (despite what mrfibble thinks I might feel like doing ;-)), I subscribe to the learn by doing school of thinking.
What you want to do is a google search on Verilog counters. As you will soon discover, counters need clocks, so you need to find what pin the clock on the board comes into your FPGA. (read the documentation for your board).
Once you have designed a counter that counts out enough time to match your "100 time units" you can generate the x = x + 1 count value.
Now run off and do some reading and studying, then come back after you've written something that still breaks your isim simulation.