Fir Filter Design using CSD coefficient and VCSE algorithm

[sundar.2.11.90]

I m doing my project in fir filter. i m using CSD coefficient using vertical common subexpression algorithm. here i m getting an expression as x4=x1-x1[-1] for [1 -1] in the row h0 and h1. where x1 is the input and x1[-1] is the delayed input by one clock pulse.
i m getting the result as '0' for above expression which gives the wrong result, can anyone tell me what will be the output of the expression..