Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

fingers and multipliers

Status
Not open for further replies.
thans spminn and forkschgrad and remaining frnds,

so u mean, capacitance between s/d and substrate will reduce, is it right, ok.
but some doubt is there, that is if one transistor is fingered into 4. so there are 4 gates and 5 s/d ok. so there are 4 Cgb, 4 Cgs and 4 Cgd.
but without fingering only one Cgd, Cgs and Cgb.

please clarify
 

I think that they are the same in schematic.But in Layout, Fingers have less parasitic cap.
 

Adding fingers does increase the parasities caps, but it is overdone by its advantages of matching,ease of current amplification, miniming LOD effect etc.
 

gksivas said:
thans spminn and forkschgrad and remaining frnds,

so u mean, capacitance between s/d and substrate will reduce, is it right, ok.
but some doubt is there, that is if one transistor is fingered into 4. so there are 4 gates and 5 s/d ok. so there are 4 Cgb, 4 Cgs and 4 Cgd.
but without fingering only one Cgd, Cgs and Cgb.

please clarify


Yes gate capacitances don't reduce when you do fingering, but if you start drawing too wide gates, the gate starts looking like an RC ladder at high frequencies. The long gate might not affect the bias at all but the high-frequency transconductance of the MOS gets screwed up.
 

Finger results into MOSFET sharing drain or sour.

Multiplier will results m individual MOSFET has their own seperated source and drain
 

Hi all,
how to set fingers and multiplier of the two transistors A and B in the schematic of a current mirror with a common-centroid layout like:
ABAB
BABA
f=2 m=2 ?
or
f=1 m=4 because even within a row all instances of e.g. A are separated by instances of B?

more difficult:
AABAA
BBABB
actually 3 separate transistors with 2 times f=2 and once f=1

What is the most realistic setting for f and m in the schematic models for such arrays?
Thank you!
 

My personal experience is Never use m.
In general by definition it is just multiple of the devices but most of PDKs I have seen do not work well with them.
a) look into model file and you will see that m does NOT mean you have the same device m times in parallel. It is used for calculation of total W and is not reflecting 4 different devices.
b) if you run Monte carlo quite often using "m" gives you incorrect answers.
c) if you run mismatch and i.e. "m=4" prevents acts as 1 device not as 4 independent ones.
d) very very often LVS/PEX will have issues with "m"

My personal recommendation is do not use it. I have no problem with "nf"
I prefer to name instance (now I will speak cadence) something like PM2<1:4> which results in 4 independent devices in parallel and all the models and monte carlo sims will be ok. Yes you have to get used to it but it is safe way to design.
 

The two concept are very similar but there are important distinctions when it comes to implementation, in particular if matching is critical:
- wtot= wf*nf*m is quite a rough approximation in recent technologies
- the finger width affects several parameters in the MOSFET model (see BSIM3 oe EKV models) e.g. threshold voltage, Vdsat, etc
- two devices for which wtot1=wtot2 will not match in general due to second order effects e.g STI stress
- using multiple fingers reduces several parasitics, which is good for speed and noise
- interdigitation usually requires multiple fingers
- common centroid layouts usually require both

Beware there are several PDK out there that do not check nf during LVS; this can generate quite different results between layout and schematic
 
Fingering: It means cutting the single transistor into many...
i.e Example:The transistor "A" is having the following parameters Total Width=80u; & Total Length=40u; fingers=1...
Now, if we want make A's transistor fingers as 10 the parameters are like W=8u, L=4u, fingers=10...The main thing is the total width will not change i..e.., multiply each transistor width with no. fingers like W=8 n fingers=10 now 8*10=80 is Total Width...the same thing for length also L=4 n fingers=10 now 4*10=40 is the Total Length...One more important thing is in fingered transistor is S or D is sharing...

Multipliers:It means the single transistor is having no. of multiples...The multiplied transistors are like normal transistors...Their is no sharing of S or D...S&D are having different terminals...
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top