files needed for timing simulation

[altair_06]

HI ...

can anyone tell me the files required for doing a timing simulation. I have obtained a netlist(.v) and a .sdf file from xilinx8.2 ise. I need to do timing simulation using NC Verilog. Where can i find the libraries in the linux environment.

 

[ananth_anbu]

Hi,
u can find solution for doubts on xilinx website. They provides all the details about tool,STA,synthesis issues.Go and search

www.xilinx.com

bye

 

[aji_vlsi]

HI ...

can anyone tell me the files required for doing a timing simulation. I have obtained a netlist(.v) and a .sdf file from xilinx8.2 ise. I need to do timing simulation using NC Verilog. Where can i find the libraries in the linux environment.

I would add a testbench file and that's it. For the library alone - I believe you need UNISIMS and SIMPRIMS lib, look for them in Xilinx install directory.

Good Luck
Ajeetha, CVC
www.noveldv.com

 

[altair_06]

HI ,

For Timing simulation, do i need both SIMPRIMS and UNISIMS library or only SIMPRIMS is enough.

 

[rsrinivas]

hi
u need to right a cmd file and add it up in ur ncelab command
check out ncsim manual and do not forget to change ur timing resolution like synthesised in ns and tool works in ps!!