feedback mechanism

[yefj]

Hello , I know that feedback is a time domain phenomena.
in the circuit below is there a mathematical way I could see how exactly opamp in the middle sees some "error" and tried to fix it?
Thanks.

 

[danadakk]

Based on drawing :

1) OpAmp has - fdbk, so its V+ = V-
2) Hence both P MOSFETs OpAmp drives creates the same current
out of their respective respective drains. If both P MOSFETs are matched.
3) Q1 circuit has same applied current as Q2 circuit
4) Q2 is a scaled (nA) version of Q1, so it tracks.....

Part of the story as I am not sure if this circuits purpose is to create
a tracking Vref or.....

Regards, Dana.

 

[yefj]

Hello,How does the tracking here works ?
what are the steps in time domain which detects error and tries to fix?
Or you think it’s not this kind of circuit ?
Thanks.

 

[danadakk]

1) V- of OpAmp = Vbe Q1
2) Tracking, that same Vbe is found at V+ of the opamp input
3) Also tracking is the OpAmp keeps the currents found out of the
upper PFETs independent of Vdd (with reason, over a range)

 

[yefj]

Hello Dana,i want to look at it from different perspective.
Suppose the minus and plus input to the opamp is not equal V_minus=V_plus+delta_v.
How does the opamp will make them equal again?
Thanks.

 

[FvM]

The PTAT circuit is copied from Razavi Analog Circuit Design, you should also review the circuit explanation.
The condition for circuit balancing is quite simple
ln( n )*VT = I*R1
resulting in a current proportional to Vt respectively absolute temperature.

 

[danadakk]

Hello Dana,i want to look at it from different perspective.
Suppose the minus and plus input to the opamp is not equal V_minus=V_plus+delta_v.
How does the opamp will make them equal again?
Thanks.

Fundamentally in OpAmp circuits with - fdbk its the Aol of the OpAmp that drives
correction. If you write node and loop equations, you will see terms divided by Aol, which
in typical OpAmps these days 100K to > 1Million.

Classic virtual ground derivation where the input differential is ~ 0 (V+in tied to GND).

Inverting Op-Amp and the Concept of Virtual Ground

In this article, the inverting op-amp configuration and the concept of virtual ground is discussed and the output expression is derived.

www.allaboutelectronics.org

https://www.khanacademy.org/science/electrical-engineering/ee-amplifiers/ee-opamp/v/ee-virtual-ground-examples

Regards, Dana.

 

[LvW]

Hello,How does the tracking here works ?
what are the steps in time domain which detects error and tries to fix?
Or you think it’s not this kind of circuit ?
Thanks.

Yefj - I recommed to study in detail the concept and the effects of/on negative feedback.
For my opinion, it does not make much sense to describe all these effects in the time domain because it takes a certain (pretty small) time until the steady state (feedback active) will be reached. This delay is caused by the amplifier properties and - if applicable - the feedback network .
As a result of this delay the closed-loop system will exhibit a limited slew rate (step response).

For some further information (explanation in the time domain) you can llok here (I have tried to describe the feedback effect in 5 timely steps):

How does the op-amp stabilize?

I have a problem understanding one thing in op-amps, namely - when the cycle of stabilizing ends? For example, when we have simple non-inverting amplifier, firstly the difference equals the amount...

electronics.stackexchange.com

 

[nitishn5]

I "think" fundamentally you are trying to apply KCL/KVL type DC equations to a system which has loops.

When there are loops, we have to look at causality. And a system which is has right half plane poles will be non-causal.
By my understanding we cannot apply regular DC equations here.
( We can do the classical, this node goes up and then that node goes down and then this goes up and so on.
But we are still thinking in time domain here )


Consider the following system and the voltages marked

By a DC logic the circuit is stable and the voltages seem to make "sense". But we know that such a system is unstable.


PS from what I have remember, the difference between positive and negative feedback appears mathematically in the solutions of the differential equations as a diverging series and converging series respectively.

 

[LvW]

By a DC logic the circuit is stable and the voltages seem to make "sense". But we know that such a system is unstable.

No - I don`t think so. A positive voltage at the inverting input causes a positive output. Is this logical?
However - I can imagine what you mean: Applying the known mathematical tools and rules seem to confirm this result - however, it is not logical.
By the way: Even simulation programs (DC analysis) cannot reveal the instability.
However, the instability will be confirmed using a transient analysis (time domain) - but only in case the supply voltages are switched on at t=0.

 

[D.A.(Tony)Stewart]

Vout is a complex combination of the PTAT, the OA gain, and the FET gm and Vt, if all R's are equal other than R1

Plotting the inverse square of R1 times 5, on left R1 on right ,both log scale with Op Amp gain = 1e5

Sim https://tinyurl.com/2xcm39h9

 

[nitishn5]

No - I don`t think so. A positive voltage at the inverting input causes a positive output. Is this logical?
However - I can imagine what you mean: Applying the known mathematical tools and rules seem to confirm this result - however, it is not logical.
By the way: Even simulation programs (DC analysis) cannot reveal the instability.
However, the instability will be confirmed using a transient analysis (time domain) - but only in case the supply voltages are switched on at t=0.

By "logically" I meant by just using the DC KVL/KCL equations... Perhaps not the best phrasing!

 

[LvW]

By "logically" I meant by just using the DC KVL/KCL equations... Perhaps not the best phrasing!

Yes - that`s how I have interpreted your wording.
More than that, it is also interesting that even an ac analysis (simulation program) shows a frequency-dependent gain response that will look as expected from a stable system. This is because the DC operational point is calculated before based on the assumption that the system is already in steady-state conditions (no supply switched-on transients).
However, the phase response will show an anomaly: Rising phase for falling gain. This indicates instability.

 

[D.A.(Tony)Stewart]

I'm not sure what you expect, but my plots are a result of my simulation with the variables given for R1 = 0.1 Ohm to 1k