Lets say you want to find out the delay of a gate :
The delay of a gate consists of two components. One is the parasitic delay p (intrinsic delay of the gate and can be found out by considering the gate driving no load) and the other component is the stage effort f.
Hence the delay d = f + p
Again, the effort is divided into two components :
Logical Effort g (Fanout) - The ratio of input capacitance of a given gate to that of an inverter capable of delivering the same output current. This does not take the load into account.
Electrical Effort h (Effective Fanout) - The ratio of input capacitance of a load to that of a gate.
Hence f = g*h and d = (g*h) + p.