Failed to get a shared lock on library 'std' (No locks available).

[vamsybb2008]

Hi,

I am trying to comply a vhdl code in cadence but i am getting an error of

"ncvhdl_p: *F,DLNOLK: Failed to get a shared lock on library 'std' (No locks available).
TOOL: ncvhdl 09.20-p007: Exiting on Aug 21, 2013 at 17:09:48 IST (total: 00:00:30) "


I have given the cds.lib file as :

"DEFINE worklib ./worklib
include $CDS_INST_DIR/tools/inca/files/cds.lib " and hdl.var file as : "DEFINE WORK worklib"

My vhdl code is :

library IEEE;
use IEEE.std_logic_1164.all;
entity trial is
port(
request_data : in std_logic;
ttl_clock_n : in std_logic;
count0 : out std_logic
);
end trial;
architecture trial_rtl of trial is
begin
count0 <= not(request_data and ttl_clock_n);
end trial_rtl;


Can anyone help me in resolving this problem ???