victoriya
Member level 2
I have designed a front-end and now i want to layout it in cadence and post layout it using assura. but there is some problems in extracting .in extracted file at both of the LNA and mixer , all of transistors have the width fixed to 15u , capacitors to 30fF, all kind of resistors to 5.62k and inductors to a few hundred pH. I manupulated the extraction(rcx) options and there was no difference between the rc extracted ,only r extracted and only c extracted file post layout simulation results. is there any idea to resolve this problem?
thank you.
thank you.