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[SOLVED] Explanation of SRAM bist logic signals

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seseandy

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bist_clk ,bist_test and bist_result are bist logic signal
who can give some explain about these signals,such as bist_result ,a signal will output what waveform in bist mode?
 

gaonkc

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sram bist logic

the output of bist result is fail or pass, no standard waveform , you can detect the result value is ok
 

AndyJing

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Re: sram bist logic

bist result is different according vendor.
Atmel bist logic result port will output signature waveform
 

tom123

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Re: sram bist logic

bist_clk: clk for bist logic;

bist_test: bist test enable signal;

bist_result: indicate bist test pass or fail, it is a level signal,

there should be a another signal

bist_finished: indicate bist test is finish.

we can determine the bist test is pass or fail by bist_result and bist_finished,

if bist test has finished , bist_result indicates test is pass or fail;





seseandy said:
bist_clk ,bist_test and bist_result are bist logic signal
who can give some explain about these signals,such as bist_result ,a signal will output what waveform in bist mode?
 

wanzuha

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sram bist logic

Yes bist_result is a logic signal. You will get this result after making a comparing between two output datas, which known good data and output form DUT.

The final result is either pass/fail
 

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