Explain me this schematic of a delay cell

[chacha]

My doubt is regarding the delay cell design. I am attaching the paper i am referring to. Fig 6( of the paper) is the schematic of the delay cell.
The author says if the tail transistor is biased in the linear region, then the output swing of the oscillator will be constant over a wide range of frequncies..

Can any body explain the reason for this??

Thanks.