george_pa
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Hello everybody,
I want to estimate Soft error rate of iscas85 circuits using hspice.I add current pulse to a random transistor's node of a gate in a specific time moment and observe a voltage drop at the output of this gate. Should i examine how voltage drop attenuates passing through the other gates of each circuit and if it manages to reach flip-flop??or should i suppose that if voltage drop is greater or smaller than vdd/2,the voltage of the node should be changed from VDD to 0 or vice versa in specific time??
I'd really appreciate any advice you could give me.
Thanks!!
I want to estimate Soft error rate of iscas85 circuits using hspice.I add current pulse to a random transistor's node of a gate in a specific time moment and observe a voltage drop at the output of this gate. Should i examine how voltage drop attenuates passing through the other gates of each circuit and if it manages to reach flip-flop??or should i suppose that if voltage drop is greater or smaller than vdd/2,the voltage of the node should be changed from VDD to 0 or vice versa in specific time??
I'd really appreciate any advice you could give me.
Thanks!!