The current loop can be "any to any, and back again". The specific
clampage asked about can protect both pins to GND or, via the
up-diode and zener, to each other (via GND, with drops) or to the
zener limit voltage (> max VDD, but no higher than needed as this
goes to ESD clamp effectiveness vs internal weak points).
Pin voltage range not-clamping will be GND-Vf (likely 0.7V nom)'
up to (Vz+Vf) and the Vz is probably binned for various normal
VDDs. But likely too, this style loses steam below 3.3V-reliable
gate oxides with all the series drops.