Yes, short-pulse BVox will be higher, but how much so
is something you'd like to know, not take rules-of-thumb.
Different ESD "models" impose very different pulse widths
(HBM, is more of a RC decay with a fast rise, long fall,
and for this case the middle ground wants exploring too -
particularly if using a "dynamic clamp" which might release
before the ESD source has fully discharged - this is in fact
a design feature that wants tuned to exceed the threat,
but of course also subject to "economies of layout" etc.).
I would pursue a TLP test of gate ox capacitors across
amplitude and time, get a map of first-fail, back off maybe
2X for scatter, luck and preventing "walking wounded"
for your design-to limit.