Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

[SOLVED] error when downloading bitstream

Status
Not open for further replies.

eshbonzie

Junior Member level 3
Joined
Aug 16, 2010
Messages
29
Helped
16
Reputation
32
Reaction score
13
Trophy points
1,283
Activity points
1,721
Well guys...Ive been trying to find a solution for this thing quite few days but could not reach anything till now!

Im simply doing a very small system (muliplierbsb--in attachmenet) to send and recieve data through the microblaze to my core. I created a core (user_logic) in XPS with 3 slave registers. Inisde this core I used a muliplier core(Muliplier_VHDL) which I designed. My aim is to write to the slave registers from the microblaze and then read the values in the registers by Muliplier_VHDL core and the write back to a register to be able to read the value written to this register from the microblaze again.

After implementing this and trying to download the bit stream I had the following errors

ERROR:NgdBuild:455 - logical net 'clk_100_0000MHz' has multiple driver(s):
pin PAD on block lmb_bram/lmb_bram/clk_100_0000MHz with type PAD,
pin CLKOUT0 on block
clock_generator_0/clock_generator_0/Using_PLL0.PLL0_INST/PLL_INST/Using_PLL_A
DV.PLL_ADV_inst with type PLL_ADV
ERROR:NgdBuild:924 - input pad net 'clk_100_0000MHz' is driving non-buffer
primitives:
pin C on block
microblaze_0/microblaze_0/Performance.Data_Flow_I/Byte_Doublet_Handle_I/MEM_D
ataBus_Byte_Enable_0 with type FDRE,
pin C on block
microblaze_0/microblaze_0/Performance.Data_Flow_I/Byte_Doublet_Handle_I/MEM_D
ataBus_Byte_Enable_1 with type FDRE,
pin C on block
microblaze_0/microblaze_0/Performance.Data_Flow_I/Byte_Doublet_Handle_I/MEM_D
ataBus_Byte_Enable_2 with type FDRE,
pin C on block
microblaze_0/microblaze_0/Performance.Data_Flow_I/Byte_Doublet_Handle_I/MEM_D
ataBus_Byte_Enable_3 with type FDRE,
pin C on block
microblaze_0/microblaze_0/Performance.Data_Flow_I/Byte_Doublet_Handle_I/MEM_D
ataBus_Write_Data_0 with type FDRE,
pin C on block
microblaze_0/microblaze_0/Performance.Data_Flow_I/Byte_Doublet_Handle_I/MEM_D
ataBus_Write_Data_1 with type FDRE,
pin C on block
microblaze_0/microblaze_0/Performance.Data_Flo
w_I/Byte_Doublet_Handle_I/MEM_D
ataBus_Write_Data_2 with type FDRE,
pin C on block
microblaze_0/microblaze_0/Performance.Data_Flow_I/Byte_Doublet_Handle_I/MEM_D
ataBus_Write_Data_3 with type FDRE,
pin C on block
microblaze_0/microblaze_0/Performance.Data_Flow_I/Byte_Doublet_Handle_I/MEM_D
ataBus_Write_Data_4 with type FDRE,
pin C on block
microblaze_0/microblaze_0/Performance.Data_Flow_I/Byte_Doublet_Handle_I/MEM_D
ataBus_Write_Data_5 with type FDRE,
pin C on block
microblaze_0/microblaze_0/Performance.Data_Flow_I/Byte_Doublet_Handle_I/MEM_D
ataBus_Write_Data_6 with type FDRE,
pin C on block
microblaze_0/microblaze_0/Performance.Data_Flow_I/Byte_Doublet_Handle_I/MEM_D
ataBus_Write_Data_7 with type FDRE,
pin C on block
microblaze_0/microblaze_0/Performance.Data_Flow_I/Byte_Doublet_Handle_I/MEM_D
ataBus_Write_Data_8 with type FDRE,
pin C on block
microblaze_0/microblaze_0/Performance.Data_Flow_I/Byte_Doublet_Handle_I/MEM_D
ataBus_Write_Data_9 with type FDRE,
pin C on block
microblaze_0/microblaze_0/Performance.Data_Flow_I/Byte_Doublet_Handle_I/MEM_D
ataBus_Write_Data_10 with type FDRE,
pin C on block
microblaze_0/microblaze_0/Performance.Data_Flow_I/Byte_Doublet_Handle_I/MEM_D
ataBus_Write_Data_11 with type FDRE,
pin C on block
microblaze_0/microblaze_0/Performance.Data_Flow_I/Byte_Doublet_Handle_I/MEM_D
ataBus_Write_Data_12 with type FDRE,
pin C on block
microblaze_0/microblaze_0/Performance.Data_Flow_I/Byte_Doublet_Handle_I/MEM_D
ataBus_Write_Data_13 with type FDRE,
pin C on block
microblaze_0/microblaze_0/Performance.Data_Flow_I/Byte_Doublet_Handle_I/MEM_D
ataBus_Write_Data_14 with type FDRE,
pin C on block
microblaze_0/microblaze_0/Performance.Data_Flow_I/Byte_Doublet_Handle_I/MEM_D
ataBus_Write_Data_15 with type FDRE
ERROR:NgdBuild:809 - output pad net
'muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/Out_1_s<0>' has an illegal load:
pin I4 on block muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/IP2Bus_Data<29>1
with type LUT6
ERROR:NgdBuild:809 - output pad net
'muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/Out_1_s<1>' has an illegal load:
pin I4 on block muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/IP2Bus_Data<30>1
with type LUT6
ERROR:NgdBuild:809 - output pad net
'muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/Out_1_s<2>' has an illegal load:
pin I4 on block muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/IP2Bus_Data<31>1
with type LUT6
ERROR:NgdBuild:455 - logical net
'muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/In_1_s<2>' has multiple
driver(s):
pin Q on block muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/In_1_s_2 with
type LD,
pin PAD on block muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/In_1_s<2> with
type PAD
ERROR:NgdBuild:924 - input pad net
'muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/In_1_s<2>' is driving non-buffer
primitives:
pin Q on block muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/In_1_s_2 with
type LD
ERROR:NgdBuild:455 - logical net
'muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/In_1_s<1>' has multiple
driver(s):
pin Q on block muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/In_1_s_1 with
type LD,
pin PAD on block muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/In_1_s<1> with
type PAD
ERROR:NgdBuild:924 - input pad net
'muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/In_1_s<1>' is driving non-buffer
primitives:
pin Q on block muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/In_1_s_1 with
type LD
ERROR:NgdBuild:455 - logical net
'muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/In_1_s<0>' has multiple
driver(s):
pin Q on block muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/In_1_s_0 with
type LD,
pin PAD on block muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/In_1_s<0> with
type PAD
ERROR:NgdBuild:924 - input pad net
'muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/In_1_s<0>' is driving non-buffer
primitives:
pin Q on block muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/In_1_s_0 with
type LD
ERROR:NgdBuild:455 - logical net
'muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/In_2_s<2>' has multiple
driver(s):
pin Q on block muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/In_2_s_2 with
type LD,
pin PAD on block muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/In_2_s<2> with
type PAD
ERROR:NgdBuild:924 - input pad net
'muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/In_2_s<2>' is driving non-buffer
primitives:
pin Q on block muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/In_2_s_2 with
type LD
ERROR:NgdBuild:455 - logical net
'muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/In_2_s<1>' has multiple
driver(s):
pin Q on block muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/In_2_s_1 with
type LD,
pin PAD on block muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/In_2_s<1> with
type PAD
ERROR:NgdBuild:924 - input pad net
'muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/In_2_s<1>' is driving non-buffer
primitives:
pin Q on block muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/In_2_s_1 with
type LD
ERROR:NgdBuild:455 - logical net
'muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/In_2_s<0>' has multiple
driver(s):
pin Q on block muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/In_2_s_0 with
type LD,
pin PAD on block muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/In_2_s<0> with
type PAD
ERROR:NgdBuild:924 - input pad net
'muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/In_2_s<0>' is driving non-buffer
primitives:
pin Q on block muliplierbsb_0/muliplierbsb_0/USER_LOGIC_I/In_2_s_0 with
type LD

---------------------------------------------------------------------------

when I synthesize and implement the design in ISE it does not give any errors, errors only appear when trying to download the bitstream in XPS

I do Understand that there is something wrong with the clock and that it has multiple drivers, but how can I find this and how can I fix it. Is it something in the pic assignment?

Also concerning the other signals, I totally have no idea whats going wrong.

Its my first time to try to integrate a whole system together and communicate with the microblaze, any advice concerning this will be appreciated.

Thanks,

Eshbon
 

Attachments

  • System.bmp
    2.1 MB · Views: 47

For whoever will be checking this post...I found out that I was doing something wrong through the steps of creating a new peripheral with my own VHDL code

follow this Link for correct way of implementation.

Eshbon
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top