error in transient analysis in cadence spectre when increasing the transistor sizes

[vijith133]

Hi,

I am working on the design of a charging circuit, where i have to increase the transistor width to almost 5000 um for allowing the current to be 500mA, but when i increase the
size of the transistor an error of this sort comes in:

Gmin = 1 pS is large enough to noticeably affect the DC solution.
dV(net43) = 50 MV
Use the `gmin_check' option to eliminate or expand this report.
C2: Initial condition computed for node net0106 is in error by 32.221 mV (1.34254 %).
Decrease `rforce' to reduce error in computed initial conditions. However, setting rforce too small may result in convergence difficulties or in the matrix becoming singular.

if i further increase the size the % error is higher, could any one suggest the solution please. It would be really of great help

 

[nitishn5]

The spice simulator adds resistances from each node to ground to aid in convergence. The value of this resistance is 1/Gmin.

Set the value of Gmin to 1e-15 or lower.

 

[vijith133]

The spice simulator adds resistances from each node to ground to aid in convergence. The value of this resistance is 1/Gmin.

Set the value of Gmin to 1e-15 or lower.

thanks for the reply, but i was interested in knowing the error in the highlighted RED characters which occurs due to the setting of capacitors initial condition.