error in netlist could not run LVS

[tran]

.cdsenv aulvs

Hi all,
I use IC 5.1.41. I have just run LVS but I met some errors. Cadence created netlists for schematic and extracted but LVS can't read these netlist. This is my log file:

Running simulation in directory: "/root/analog/LVS".

Begin netlist at: Nov 15 22:48:01 2006
view name list = ("symlvs" "auLvs" "schematic" "gate_sch" "cmos_sch")
stop name list = ("symlvs" "auLvs")
library name = "Layout-PLL"
cell name = "test3"
view name = "schematic"
globals lib = "basic"
Setting layout cdsenv options.
Initializing vpnp.cbe from libInit.il for library gpdk...
Initializing moscap.cbe from libInit.il for library gpdk...
...
Initializing utility.ile from libInit.il for library gpdk...
End netlist: Nov 15 22:48:01 2006


Begin netlist at: Nov 15 22:48:01 2006
view name list = ("symlvs" "auLvs" "schematic" "symbolic")
stop name list = ("symlvs" "auLvs")
library name = "Layout-PLL"
cell name = "test3"
view name = "extracted"
globals lib = "basic"
Setting layout cdsenv options.
Initializing vpnp.cbe from libInit.il for library gpdk...
Initializing moscap.cbe from libInit.il for library gpdk...
...
Initializing utility.ile from libInit.il for library gpdk...
End netlist: Nov 15 22:48:01 2006

Running netlist comparison program: LVS
Begin comparison: Nov 15 22:48:01 2006
@(#)$CDS: LVS version 5.1.0 06/11/2004 23:14 (intelibm5.Cadence.COM) $
End comparison: Nov 15 22:48:02 2006
Unrecognized input "No" in netlist.
Line number 5
Errors found in /root/analog/LVS/layout/netlist.
/CDS/tools.lnx86/dfII/bin/32bit/LVS aborted.
si: Comparison did not complete without errors.


Comparison program did not complete. Check the log.

And my netlist :

Layout netlist

n 0 /vdd!
n 1 /gnd!
n 2 /out
n 3 /in
No element format property found for element /+1
No element format property found for element /+0
t 1 "gnd!" inputOutput
t 0 "vdd!" inputOutput
t 2 "out" inputOutput
t 3 "in" inputOutput


Schematic netlist

n 1 gnd!
n 0 vdd!
n 4 /in
n 5 /out
No element format property found for element /MP0
No element format property found for element /MN0
t 5 "out" output
t 4 "in" input
t 0 "vdd!" global
t 1 "gnd!" global

Can anyone help me to solve this problem?.
Thank you very much for your help.

 

[truebs]

spiral inductor lvs

Most probably the error is with the generated netlist itself, you need to make a proper netlist from schematic (with out any error ) for having successful LVS, The possible error can be in the layout where the device is not properly drawn so as to be extracted for its properties.

 

[tran]

moscap netlist

I have just checked schematic and layout but there is not error. So can anyone help me to solve this problem step to step?
Thanks.

 

[sonli]

cannot run lvs

Try to set the environment variable 'CDS_Netlisting_Mode' to 'Analog' before starting Cadence

% setenv CDS_Netlisting_Mode Analog

 

[tran]

cadence lvs no element

Thanks, now there is not error for the cell in gpdk but there is still error for the cell in other library. I use spiral inductor in passiveLib (in rfsamples) but I only use its symbol on schematic I cannot use its layout in layout. So when I run LVS I meet error. Cadence cannot see layout and symbol of spiral inductor, and I meet the same error as for the mos:

" *WARNING* invalid cell view -- 0(unknown)
*WARNING* invalid cell view -- 0(unknown)
*WARNING* invalid cell view -- 0(unknown)
*WARNING* invalid cell view -- 0(unknown)
*WARNING* invalid cell view -- 0(unknown)
global error:
Cannot find switch master cell for instance I17 in cellView (PLL schematic) from viewlist 'lvs schematic gate_sch cmos_sch ' in library 'pll'.

Can anyone give me some idea about this error? I think I have to use layout of the spiral inductor to synchronize the schematic and the layout to solve this error. Can anyone help me ?
Thank you very much for your help

 

[tran]

cadence lvs no element format

Can anyone show me how to use spiral inductor's layout?
Thank you very much.

 

[tran]

Have anyone ever used layout of spiral inductor? Can anyone help me to solve this problem? I need to use it layout for my report.
Thank you very much.

 

[tran]

Have you ever used layout of the spiral inductor? Can you show me how to use it?
Thank you