My bandgap opamp got ard 3 mv offset. And i use it for ADC with resolution of 7 mv. Do you think i need to have input offset cancellation to eliminate the input offset by using switch capacitor technique. Any disadvantage by using this technique as need to use clock and it will introduce noise to the bandgap?
a pipelined ADC doesnt mind a offset of Vref/4 but even for that application the offset you have a large one.... so i think you need offset cancellation....
I think it's not so difficult to control the OPAMP's OS less than 2mV
in the BGR.
BGR doesn't need very high BandWidth.So the device used in BGR can be a little large to reduce the os.
But it depends on process.