eklikeroomys
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I used Encounter Library Characterizer to characterize a digital standard cell library. I obtained the .lib file by using the alf2lib tool in the ELC package, and the vhdl VITAL file using the alf2vhdl tool.
Now, I need to synthesize a design using the alf and vhdl files in Ambit, but Ambit does not support the VHDL syntax generated by the ELC alf2vhdl tool. There also does not seem to be an option for correcting the format by the alf2vhdl tool. Is there an option in Ambit or perhaps another tool that will generate the correct VHDL syntax required by Ambit for synthesis?
Thank you
Now, I need to synthesize a design using the alf and vhdl files in Ambit, but Ambit does not support the VHDL syntax generated by the ELC alf2vhdl tool. There also does not seem to be an option for correcting the format by the alf2vhdl tool. Is there an option in Ambit or perhaps another tool that will generate the correct VHDL syntax required by Ambit for synthesis?
Thank you